Broadcasting in Bus Interconnection Networks

In most distributed memory MIMD multiprocessors, processors are connected by a point-to-point interconnection network. Since interprocessor communication frequently constitutes serious bottlenecks, several architectures were proposed that enhance point-to-point topolo-gies with the help of multiple bus systems so as to improve the communication eeciency. In this paper we study parallel architectures where the communication means are constituted solely by buses. These archi-tectures can use the power of bus technologies, providing a way to interconnect much more processors in a simple and eecient manner. We present the hyperpath, hypergrid, hyperring, and hypertorus architectures, which are the bus-based versions of the well used point-to-point inter-connection networks. Using (hyper) graph theoretic concepts to model inter-processor communication in such networks, we give optimal algorithms for broadcasting a message from one processor to all the others. For deriving high performance communication patterns we developed a new tool called simpliication.